Welcome to ChipScale's Web Site
ChipScale is one of the leading developers of Wafer Level Chip Scale Packaging.  Our packaging technologies are being used for a variety of silicon electronic devices.  The technologies are also applicable to GaAs devices.

Wafer Level Chip Scale Packaging offers higher performance, lower cost, and smaller size than current surface mount packages.

ChipScale and its licensees continue to work with other companies in the industry to advance the acceptance of wafer level packaging and its benefits.

Introducing the Face-up Chip™ Technology
The face-up technology is an outgrowth of the original Micro SMT^® technology.  The Face-up package offers the economics of flipchip, but without several of the liabilities of flipchip.

Micro  SMT®, Face-up Chip™, and MGA™ Chip Scale Wafer Level Packaging Technologies
Decreased size, increased performance, and the lowest cost platform are the reasons the  electronics industry is gearing up for wafer level  packaging technology. ChipScale offers the Micro SMT®, Face-up Chip™, and MGA™  wafer level packaging technology with the broadest  application potential for wafer level packaging  implementation. These technologies have been used to package integrated circuits, discretes, and integrated passive components^.